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Features
* Protocol
- USB Used as a Physical Layer - Device Firmware Upgrade Class Compliant - Auto-Frequency Detection * In-System Programming - Read/Write Flash Memory - Read Device ID - Full-chip Erase - Read/Write Configuration Bytes - Security Setting from ISP Command - Remote Application Start Command * In-Application Programming/Self-Programming - Read/Write Flash Memory - Read Device ID - Block Erase - Read/Write Configuration Bytes - Bootloader Start
USB Microcontrollers
AT89C51SND1 USB Bootloader
Description
This document describes the USB bootloader functionalities as well as the USB protocol to efficiently perform operations on the on-chip Flash memory. Additional information on the AT89C51SND1 product can be found in the AT89C51SND1 datasheet and the AT89C51SND1 errata sheet available on the Atmel web site. The bootloader software (binary file) currently used for production is available from the Atmel web site.
Bootloader Revision Revisions 1.6.2 and higher
Purpose of Modifications First release
Date 3/25/2003
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Functional Description
In-System Programming Capability
The AT89C51SND1 USB Bootloader facilitates In-System Programming (ISP) and In-Application Programming. In-System Programming allows the user to program or reprogram the microcontroller on-chip Flash memory without removing it from the system and without the need of a pre-programmed application. The USB bootloader can manage a communication with a host through the USB bus. It can also access and perform requested operations on the on-chip Flash memory.
In-Application Programming or Self- Programming Capability Block Diagram
IAP allows the reprogramming of the microcontroller on-chip Flash memory without removing it from the system and while the embedded application is running. The USB bootloader contains some Application Programming Interface routines named API routines allowing IAP by using the user's firmware. This section describes the different parts of the USB bootloader. Figure 1 shows the on-chip bootloader and IAP processes. Figure 1. Bootloader Process Description
External host via the USB Protocol Communication On-chip User Application
ISP Communication Management
IAP User Call Management
Flash Memory Management
Flash Memory
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ISP Communication Management The purpose of this process is to manage the communication and its protocol between the onchip bootloader and an external device (host). The on-chip bootloader implements a USB protocol (see Section "Protocol", page 12). This process translates serial communication frames (USB) into Flash memory accesses (read, write, erase...).
User Call Management Several Application Program Interface (API) calls are available to the application program to selectively erase and program Flash pages. All calls are made through a common interface (API calls) included in the bootloader. The purpose of this process is to translate the application request into internal Flash memory operations. Flash Memory Management This process manages low level accesses to the Flash memory (performs read and write accesses).
Bootloader Configuration
Configuration and Manufacturer Information The following table lists Configuration and Manufacturer byte information used by the bootloader. This information can be accessed through a set of API or ISP commands. Table 1. Configuration and Manufacturer Information
Mnemonic BSB SBV SSB EB Manufacturer Id1: Family Code Id2: Product Name Id3: Product Revision Description Boot Status Byte Software Boot Vector Software Security Byte Extra Byte Default Value FFh FOh FFh FFh 58h D7h F7h DFh
Mapping and Default Value of Hardware Security Byte
The 4 MSB of the Hardware Byte can be read/written by software (this area is called Fuse bits). The 4 LSB can only be read by software and written by hardware using parallel programmer devices, this area is called Lock bits. Table 2. Hardware Byte Information
Bit Position 7 6 5 4 3 2 1 0 Mnemonic X2B BLJB - - reserved LB2 LB1 LB0 Default Value U P U U U P U U To lock the chip (see datasheet) Description To start in x1 mode To map the boot area in code area between F000h-FFFFh
Note:
U: Unprogrammed = 1 P: Programmed = 0
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Security
The bootloader has Software Security Byte (SSB see Table 7) to protect itself from user access or ISP access. The Software Security Byte (SSB) protects from ISP accesses. The command `Program Software Security Bit' can only write a higher priority level. There are three levels of security: * Level 0: NO_SECURITY (FFh) This is the default level. From level 0, one can write level 1 or level 2. Level 1: WRITE_SECURITY (FEh) In this level it is impossible to write in the Flash memory. The Bootloader returns an err_WRITE status. From level 1, one can write only level 2. Level 2: RD_WR_SECURITY (FCh) Level 2 forbids all read and write accesses to/from the Flash memory. The Bootloader returns an err_WRITE or an err_VENDOR status.
*
*
Only a full chip erase command can reset the software security bits. Table 3. Security Levels
Level 0 Flash Fuse bit BSB & SBV & EB SSB Manufacturer info Bootloader info Erase block Full chip erase Blank Check Any access allowed Any access allowed Any access allowed Any access allowed Read only access allowed Read only access allowed Allowed Allowed Allowed Level 1 Read only access allowed Read only access allowed Any access allowed Write level2 allowed Read only access allowed Read only access allowed Not allowed Allowed Allowed Level 2 All access not allowed All access not allowed Any access allowed Read only access allowed Read only access allowed Read only access allowed Not allowed Allowed Allowed
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Software Boot Vector
The Software Boot Vector (SBV see Table 6) forces the execution of a user bootloader starting at address [SBV]00h in the application area (FM0). The way to start this user bootloader is described in Section "Bootloader Configuration".
USB Bootloader User Bootloader Application [SBV]00h FM1
FM0
FLIP Software Program
FLIP is a PC software program running under Windows(R) 9x/Me/2000/XP and LINUX(R) that supports all Atmel Flash microcontrollers and USB protocol communication media. This free software program is available from the Atmel web site.
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In-System Programming
The ISP allows the user to program or reprogram the microcontroller's on-chip Flash memory through the serial line without removing it from the system and without the need of a pre-programmed application. This section describes how to start the USB bootloader and the higher level protocol.
Bootloader Execution
As internal C51 code space is limited to 64K bytes, some mechanisms are implemented to allow boot memory to be mapped in the code space for execution at addresses F000h to FFFFh. The boot memory is enabled by setting the ENBOOT bit in AUXR1 (see Table 4). The three ways to set this bit are detailed below. The software way to set ENBOOT consists in writing to AUXR1 from the user's software. This enables bootloader or API routines execution. The hardware condition is based on the ISP# pin. When driving this pin to low level, the chip reset sets ENBOOT and forces the reset vector to F000h instead of 0000h in order to execute the bootloader software. As shown in Figure 2, the hardware condition always allows In-System recovery when user's memory has been corrupted.
Software Boot Mapping Hardware Condition Boot Mapping
Programmed Condition Boot Mapping
The programmed condition is based on the Bootloader Jump Bit (BLJB) in HSB (see Table 5). As shown in Figure 2, this bit is programmed (by hardware or software programming mode), the chip reset set ENBOOT and forces the reset vector to F000h instead of 0000h, in order to execute the bootloader software.
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Figure 2. Boot Process Algorithm
RESET
Hard Cond? ISP# = L?
Hardware Process
Prog Cond? BLJB = P?
Hard Cond Init ENBOOT = 1 PC = F000h FCON = 00h
Standard Init ENBOOT = 0 PC = 0000h FCON = F0h
Prog Cond Init ENBOOT = 1 PC = F000h FCON = F0h
Hard Init? FCON = 00h?
Software Process
User Boot? SBV < F0h?
User's Application
User's Bootloader
Atmel's Bootloader
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Registers
Special Function Register Table 4. AUXR1 Register AUXR1 (S:A2h) - Auxiliary Register 1
7 6 Bit Mnemonic 5 ENBOOT 4 3 GF3 2 0 1 0 DPS
Bit Number 7-6
Description Reserved The value read from these bits are indeterminate. Do not set these bits. Enable Boot Flash Set this bit to map the boot Flash in the code space between at addresses F000h to FFFFh. Clear this bit to disable boot Flash. Reserved The value read from this bit is indeterminate. Do not set this bit. General Flag This bit is a general-purpose user flag. Always Zero This bit is stuck to logic 0 to allow INC AUXR1 instruction without affecting GF3 flag. Reserved for Data Pointer Extension. Data Pointer Select Bit Set to select second data pointer: DPTR1. Clear to select first data pointer: DPTR0.
5
ENBOOT
(1)
4 3 2 1 0
GF3 0 DPS
Reset Value = XXXX 00X0b
Note: 1. ENBOOT bit is only available in AT89C51SND1 product.
Hardware Bytes
Table 5. HSB Byte - Hardware Security Byte
7 X2B 6 BLJB Bit Mnemonic X2B(1) 5 4 3 2 LB2 1 LB1 0 LB0
Bit Number 7
Description X2 Bit Program this bit to start in X2 mode. Unprogram (erase) this bit to start in standard mode. Boot Loader Jump Bit Program this bit to execute the boot loader at address F000h on next reset. Unprogram (erase) this bit to execute user's application at address 0000h on next reset. Reserved The value read from these bits is always unprogrammed. Do not program these bits. Reserved The value read from this bit is always unprogrammed. Do not program this bit. Hardware Lock Bits Refer to for bits description.
6
BLJB(2)
5-4
-(3) LB2:0(3)
3
2-0
Reset Value = XXUU UXXX, UUUU UUUU after an hardware full chip erase. 8
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Note: 1. X2B initializes the X2 bit in CKCON during the reset phase. 2. In order to ensure boot loader activation at first power-up, AT89C51SND1 products are delivered with BLJB programmed. 3. Bits 0 to 3 (LSN) can only be programmed by hardware mode.
Table 6. SBV Byte - Software Boot Vector
7 ADD15 6 ADD14 Bit Mnemonic ADD15:8 5 ADD13 4 ADD12 3 ADD11 2 ADD10 1 ADD9 0 ADD8
Bit Number 7-0
Description MSB of the user's boot loader 16-bit address location Refer to the boot loader datasheet for usage information (boot loader dependent)
Reset Value = XXXX XXXX, UUUU UUUU after an hardware full chip erase. Table 7. SSB Byte - Software Security Byte
7 SSB7 6 SSB6 Bit Mnemonic SSB7:0 5 SSB5 4 SSB4 3 SSB3 2 SSB2 1 SSB1 0 SSB0
Bit Number 7-0
Description Software Security Byte Data Refer to the boot loader datasheet for usage information (boot loader dependent)
Reset Value = XXXX XXXX, UUUU UUUU after an hardware full chip erase.
Physical Layer
The USB norm specifies all the transfers over the USB line. The USB specification also includes several CLASS and SUB-CLASS specifications. These stand-alone documents are used by the manufacturer to implement a USB link between a PC and a device supporting the In-System Programming. Mostly, the USB specification is implemented by hardware (automatic reply, handshakes, timings, ...) and the USB Classes and SubClasses are implemented by software at a data level. Figure 3. USB Bus Topography Downstream Transfer: OUT Upstream Transfer: IN PC Driver PC Application USB line PC (Host) The USB used to transmit information has the following configuration: * * USB DFU using the Default Control Endpoint only (endpoint 0) with a 32 bytes length. 48 MHz for USB controller: frequency auto-detection performed by the bootloader. Device driver/API Firmware Application (Device)
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48 MHz Frequency Auto-generation
The following table shows the allowed frequencies compatible with the USB bootloader 48 MHz auto-generation.
12 MHz X1 - X2 OK 16 MHz OK 20 MHz OK
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Figure 4. 48 MHz Frequency Auto-generation
MAIN
No
USB Connected? Suspend/Resume Yes
No
Resume Detected? Yes Configure PLL for Frequency X Configure Timer 0
Yes
SOF Detected?
No
Timer 0 Overflow?
No
Yes
Change Frequency
USB Scheduler
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Protocol
Device Firmware Upgrade Introduction Device Firmware Upgrade is the mechanism for accomplishing the task of upgrading the device firmware. Any class of USB device can exploit this capability by supporting the requirements specified in this document. Because it is impractical for a device to concurrently perform both DFU operations and its normal run-time activities, those normal activities must cease for the duration of the DFU operations. Doing so means that the device must change its operating mode; i.e., a printer is not a printer while it is undergoing a firmware upgrade; it is a PROM programmer. However, a device that supports DFU is not capable of changing its mode of operation on its own. External (human or host operating system) intervention is required. DFU Specific Requests In addition of the USB standard requests, 7 DFU class-specific requests are employed to accomplish the upgrade operations, see Figure 4. Table 8. DFU Class-specific Requests
bmRequestType 0010 0001b 0010 0001b 1010 0001b 1010 0001b 0010 0001b 1010 0001b 0010 0001b bRequest DFU_DETACH (0) DFU_DNLOAD (1) DFU_UPLOAD (2) DFU_GETSTATUS (3) DFU_CLRSTATUS (4) DFU_GETSTATE (5) DFU_ABORT (6) wValue wTimeout wBlock wBlock Zero Zero Zero Zero wIndex Interface (4) Interface (4) Interface (4) Interface (4) Interface (4) Interface (4) Interface (4) wLength Zero Length Length 6 Zero 1 Zero Data none Firmware Firmware Status none State none
DFU Descriptors Set
The device exports the DFU descriptor set, which contains: * * * * A DFU device descriptor A single configuration descriptor A single interface descriptor (including descriptors for alternate settings, if present) A single functional descriptor
DFU Device Descriptor
This descriptor is only present in the DFU mode descriptor set. The DFU class code is reported in the bDeviceClass field of this descriptor. Table 9. USB Parameters
Parameter Vendor ID Product ID Release Number ATMEL - AT89C51SND1 Bootloader 0x03EB 0x2FFF 0x0000
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Table 10. DFU Mode Device Descriptor
Offset 0 1 2 4 5 6 7 8 10 12 14 15 16 17 Field bLength bDescriptorType bcdUSB bDeviceClass bDeviceSubClass bDeviceProtocol bMaxPacketSize0 idVendor idProduct bcdDevice iManufacturer iProduct iSerialNumber bNumConfigurations Size 1 1 2 1 1 1 1 2 2 2 1 1 1 1 Value 12h 01h 0100h FEh 01h 00h 32 03EBh 2FFFh 0x0000 0 0 0 01h Description Size of this descriptor, in bytes DFU FUNCTIONAL descriptor type USB specification release number in binary coded decimal Application Specific Class Code Device Firmware Upgrade Code The device does not use a class specific protocol on this interface Maximum packet size for endpoint zero Vendor ID Product ID Device release number in binary coded decimal Index of string descriptor Index of string descriptor Index of string descriptor One configuration only for DFU
DFU Configuration Descriptor DFU Interface Descriptor
This descriptor is identical to the standard configuration descriptor described in the USB DFU specification version 1.0, with the exception that the bNumInterfaces field must contain the value 01h. This is the descriptor for the only interface available when operating in DFU mode. Therefore, the value of the bInterfaceNumber field is always zero. Table 11. DFU mode Interface Descriptor
Offset 0 1 2 3 4 5 6 7 8 Field bLength bDescriptorType bInterfaceNumber bAlternateSetting bNumEndpoints bInterfaceClass bInterfaceSubClass bInterfaceProtocol iInterface Size 1 1 1 1 1 1 1 1 1 Value 09h 04h 00h 00h 00h FEh 01h 00h 00h Description Size of this descriptor, in bytes INTERFACE descriptor type Number of this interface Alternate setting (1) Only the control pipe is used Application Specific Class Code Device Firmware Upgrade Code The device doesn't use a class specific protocol on this interface Index of the String descriptor for this interface
Note:
1. Alternate settings can be used by an application to access additional memory segdescriptor to indicate the target memory segment; e.g., "EEPROM". Details concerning other
ments. In this case, it is suggested that each alternate setting employs a string
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possible uses of alternate settings are beyond the scope of this document. However, their use is intentionally not restricted because it is anticipated that implementers will devise additional creative uses for alternate settings.
DFU Functional Descriptor
Table 12. DFU Functional Descriptor
Offset 0 1 Field bLength bDescriptorType Size 1 1 Value 07h 21h Description Size of this descriptor, in bytes DFU FUNCTIONAL descriptor type DFU Attributes: bit 7:3: reserved 2 bmAttributes 1 bit 2: device is able to communicate via USB after Bit mask Manifestation phase 1 = yes, 0 = no, must see bus reset bit 1: bitCanUpload: upload capable 1 = yes, 0 = no bit 0: bitCanDnload: download capable 1 = yes, 0 = no Time in milliseconds that the device will wait after receipt of the DFU_DETACH request. 3 wDetachTimeOut 2 Number If this time elapses without a USB reset, the device will terminate the Reconfiguration phase and revert back to normal operation. This represents the maximum time that the device can wait (depending on its timers, ...). The Host may specify a shorter timeout in the DFU_DETACH request. Maximum number of bytes that the device can accept per control-write transaction
5
wTransferSize
2
Number
Command Description
This protocol allows to: * * * * * * * Initiate the communication Program the Flash Data Read the Flash Data Program Configuration Information Read Configuration and Manufacturer Information Erase the Flash Start the application
Overview of the protocol is detailed in Appendix-A.
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Device Status
Get Status The Host employs the DFU_GETSTATUS request to facilitate synchronization with the device. This status gives information on the execution of the previous request: in progress/OK/Fail/...
bmRequestType 1010 0001b 0010 0001b
bRequest DFU_GETSTATUS (3) DFU_CLRSTATUS (4)
wValue Zero Zero
wIndex Interface (4) Interface (4)
wLength 6 Zero
Data Status none
The device responds to the DFU_GETSTATUS request with a payload packet containing the following data: Table 13. DFU_GETSTATUS Response
Offset 0 Field bStatus Size 1 Value Number Description An indication of the status resulting from the execution of the most recent request.
1
bwPollTime Out
3
Minimum time in milliseconds that the host should wait before sending a subsequent DFU_GETSTATUS. The purpose of this field is to allow the device to dynamically adjust the amount of time that the device Number expects the host to wait between the status phase of the next DFU_DNLOAD and the subsequent solicitation of the device's status via DFU_GETSTATUS. Number Index An indication of the state that the device is going to enter immediately following transmission of this response. Index of status description in string table.
4 5
bState iString
1 1
Table 14. bStatus Values
Status OK errTARGET errFILE errWRITE errERASE errCHECK_ERASE D errPROG errVERIFY errADDRESS errNOTDONE errFIRMWARE Value 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A Description No error condition is present File is not targeted for use by this device File is for this device but fails some vendor-specific verification test Device id unable to write memory Memory erase function failed Memory erase check failed Program memory function failed Programmed memory failed verification Cannot program memory due to received address that is out of range Received DFU_DNLOAD with wLength = 0, but device does not think it has all the data yet Device's firmware is corrupted. It cannot return to run-time operations
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Table 14. bStatus Values (Continued)
Status errVENDOR errUSBR errPOR errUNKNOWN errSTALLEDPK Value 0x0B 0x0C 0x0D 0x0E 0x0F Description iString indicates a vendor-specific error Device detected unexpected USB reset signaling Device detected unexpected power on reset Something went wrong, but the device does not know what it was Device stalled an unexpected request
Table 15. bState Values
State appIDLE appDETACH dfuIDLE dfuDNLOAD-SYNC dfuDNBUSY dfuDNLOAD-IDLE Value 0 1 2 3 4 5 Description Device is running its normal application Device is running its normal application, has received the DFU_DETACH request, and is waiting for a USB reset Device is operating in the DFU mode and is waiting for requests Device has received a block and is waiting for the Host to solicit the status via DFU_GETSTATUS Device is programming a control-write block into its non-volatile memories Device is processing a download operation. Expecting DFU_DNLOAD requests Device has received the final block of firmware from the Host and is waiting for receipt of DFU_GETSTATUS to begin the Manifestation phase dfuMANIFEST-SYNC 6 or device has completed the Manifestation phase and is waiting for receipt of DFU_GETSTATUS. dfuMANIFEST dfuMANIFEST-WAITRESET dfuUPLOAD-IDLE dfuERROR 7 8 9 10 Device is in the Manifestation phase. Device has programmed its memories and is waiting for a USB reset or a power on reset. The device is processing an upload operation. Expecting DFU_UPLOAD requests. An error has occurred. Awaiting the DFU_CLRSTATUS request.
Clear Status
Any time the device detects an error and reports an error indication status to the host in the response to a DFU_GETSTATUS request, it enters the dfuERROR state. The device cannot transition from the dfuERROR state, after reporting any error status, until after it has received a DFU_CLRSTATUS request. Upon receipt of DFU_CLRSTATUS, the device sets a status of OK and transitions to the dfuIDLE state. Only then it is able to transition to other states.
bmRequestType 0010 0001b bRequest DFU_CLRSTATUS (4) wValue Zero wIndex Interface (4) wLength 0 Data None
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Device State This request solicits a report about the state of the device. The state reported is the current state of the device with no change in state upon transmission of the response. The values specified in the bState field are identical to those reported in DFU_GETSTATUS.
bmRequestType 1010 0001b bRequest DFU_GETSTATE (5) wValue Zero wIndex Interface (4) wLength 1 Data State
DFU_ABORT Request
The DFU_ABORT request enables the device to exit from certain states and return to the DFU_IDLE state. The device sets the OK status on receipt of this request. For more information, see the corresponding state transition summary.
bmRequestType 1010 0001b bRequest DFU_ABORT (6) wValue Zero wIndex Interface (4) wLength 0 Data None
Programming the Flash
The firmware image is downloaded via control-write transfers initiated by the DFU_DNLOAD class-specific request. The host sends between bMaxPacketSize0 and wTransferSize bytes to the device in a control-write transfer. Following each downloaded block, the host solicits the device status with the DFU_GETSTATUS request. As described in the USB DFU Specification, Firmware images for specific devices are, by definition, vendor specific. It is therefore required that target addresses, record sizes, and all other information relative to supporting an upgrade are encapsulated within the firmware image file. It is the responsibility of the device manufacturer and the firmware developer to ensure that their devices can consume these encapsulated data. With the exception of the DFU file suffix, the content of the firmware image file is irrelevant to the host. Firmware image: * * 32 bytes: Command X bytes: X is the number of byte (00h) added before the first significative byte of the firmware. The X number is calculated to align the beginning of the firmware with the Flash page. X = start_address [32]. For example, if the start address is 00AFh (175d), X = 175 [32] = 15. The firmware The DFU Suffix on 16 Bytes
* *
Table 16. DFU File Suffix
Offset -0 -4 Field dwCRC bLength Size 4 1 Value Description Number The CRC of the entire file, excluding dwCRC 16 5: 44h -5 ucDfuSignature 3 6: 46h 7: 55h -8 bcdDFU 2 BCD 0100h ID DFU specification number The vendor ID associated with this file. Either FFFFh or must match device's vendor ID The unique DFU signature field The length of this DFU suffix including dwCRC
- 10
idVendor
2
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Table 16. DFU File Suffix
Offset - 12 Field idProduct Size 2 Value ID Description The product ID associated with this file. Either FFFFf or must match device's product ID The release number of the device associated with this file. Either FFFFh or a BCD firmware release or version number
- 14
bcdDevice
2
BCD
Request from Host
bmRequestType 0010 0001b bRequest DFU_DNLOAD (1) wValue wBlock wIndex Interface (4) wLength Length Data Firmware
Write Command
Command Identifier Id_prog_start 01h data[0] 00h data[1] data[2] data[3] data[4] Description Init Flash programming
start_address
end_address
The write command is 6 bytes long. In order to reach the USB specification of the Control type transfers, the write command is completed with 26 (=32-6) non-significant bytes. The total length of the command is then 32 bytes, which is the length of the Default Control Endpoint. Firmware The firmware can now be downloaded to the device. In order to be in accordance with the Flash page size (128 bytes), X non-significant bytes are added before the first byte to program. The X number is calculated to align the beginning of the firmware with the Flash page. X = start_address [32]. For example, if the start address is 00AFh (175d), X = 175 [32] = 15. The DFU suffix of 16 bytes are added just after the last byte to program. This suffix is reserved for future use.
DFU Suffix
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Figure 5. Example of Firmware Download Zero Length DFU_DNLOAD Request SETUP OUT OUT OUT DFU_DNLOAD Prog_Start + (EP0 FIFO length - 6) x 00h X offset bytes + Firmware Packet 1 Firmware Packet 2
OUT IN
Firmware Packet n + DFU suffix ZLP The Host sends a DFU_DNLOAD request with the wLength field cleared to 0 to the device to indicate that it has completed transferring the firmware image file. This is the final payload packet of a download operation. This operation should be preceded by a Long Jump address specification using the corresponding Flash command.
Answers from Bootloader
After each program request, the Host can request the device state and status by sending a DFU_GETSTATUS message. If the device status indicates an error, the host can send a DFU_CLRSTATUS request to the device. The flow described below allows the user to read data in the Flash memory. A blank check command on the Flash memory is possible with this flow. This operation is performed in 2 steps: 1. DFU_DNLOAD request with the read command (6 bytes) 2. DFU_UPLOAD request which correspond to the immediate previous command.
Reading the Flash
First Request from Host
The Host sends a DFU Download request with a Display command in the data field.
SETUP OUT IN
DFU_DNLOAD Display_Data (6 bytes) ZLP
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Command Identifier Id_display_data 03h
data[0] 00h
data[1]
data[2]
data[3]
data[4]
Description Display Flash Data
start_address 01h
end_address Blank Check in Flash
Second Request from Host Answers from the Device
The Host sends a DFU Upload request. The device send to the Host the firmware from the specified start address to the end address. SETUP IN IN DFU_UPLOAD Firmware Packet 1 Firmware Packet 2
IN OUT
Firmware Packet n ZLP
Answers from the Device to a Blank Check Command
The Host controller send a GET_STATUS request to the device. Once internal blank check has been completed, the device sends its status. * * If the device status is "OK": the device memory is then blank and the device waits the next Host request. If the device status is "errCHECK_ERASED": the device memory is not blank. The device waits for an DFU_UPLOAD request to send the first address where the byte is not 0xFF.
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Programming Configuration Information
The flow described below allows the user to program Configuration Information regarding the bootloader functionality. * Boot Process Configuration: - - - BSB SBV Fuse bits (BLJB, X2B) (see Section "Mapping and Default Value of Hardware Security Byte", page 3).
Ensure that the Program Fuse bit command programs the 4 Fuse bits at the same time. Request from Host To start the programming operation, the Host sends DFU_DNLOAD request with the Write command in the data field (6 bytes).
SETUP OUT IN
DFU_DNLOAD Write_command (6 bytes) ZLP
Command Identifier
data[0]
data[1] 00h 01h
data[2]
data[3]
data[4]
Description Write value in BSB Write value in SBV
Id_write_command 04h
01h 05h 06h 02h 00h
Value Write value in SSB Write value in EB Value Write value in Fuse (HSB)
Answers from Bootloader
The device has two possible answers to a DFU_GETSTATUS request: * * If the chip is protected from program access, a "err_WRITE" status is returned to the Host. Otherwise, the device status is "OK".
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Reading Configuration Information or Manufacturer Information Requests from Host
The flow described below allows the user to read the configuration or manufacturer information.
To start the programming operation, the Host sends DFU_DNLOAD request with the Read command in the data field (2 bytes).
SETUP OUT IN
DFU_DNLOAD Read_command (2 bytes) ZLP
Command Identifier
data[0]
data[1] 00h
data[2]
data[3]
data[4]
Description Read Bootloader Version Read Device boot ID1 Read Device boot ID2 Read BSB Read SBV Read SSB Read EB Read Manufacturer Code Read Family Code Read Product Name Read Product Revision Read HWB
00h
01h 02h 00h 01h
Id_read_command 05h 01h
05h 06h 30h 31h 60h 61h 02h 00h
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Answers from Bootloader The device has two possible answers to a DFU_GETSTATUS request: * * If the chip is protected from program access, a "err_VENDOR" status is returned to the Host. Otherwise, the device status is "OK". The Host can send a DFU_UPLOAD request to the device in order the value of the requested field.
SETUP IN OUT
DFU_UPLOAD Byte value (1 byte) ZLP
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Erasing the Flash
The flow described below allows the user to erase the Flash memory. Two modes of Flash erasing are possible: * * Full chip erase Block erase
The Full Chip erase command erases the whole Flash (32 Kbytes) and sets some Configuration Bytes at their default values: * * * BSB = FFh SBV = FFh SSB = FFh (NO_SECURITY)
The Block erase command erases only a part of the Flash. Four Blocks are defined in the AT89C51SND1: * * * * Request From Host block0 (from 0000h to 1FFFh) block1 (from 2000h to 3FFFh) block2 (from 4000h to 7FFFh) block3 (from 8000h to FFFFh)
To start the erasing operation, the Host sends a DFU_DNLOAD request with a Write Command in the data field (2 bytes).
Command Identifier data[0] data[1] 00h 20h Id_write_command 04h 00h 40h 80h FFh data[2] data[3] data[4] Description Erase block0 (0K to 8K) Erase block1 (8K to 16K) Erase block2 (16K to 32K) Erase block3 (32K to 64K) Full Chip Erase (bits at FFh)
Answers from Bootloader
The device has two possible answers to a DFU_GETSTATUS request: * * If the chip is protected from program access, a "err_WRITE" status is returned to the Host. Otherwise, the device status is "OK".
The full chip erase is always executed whatever the Software Security Byte value is.
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Starting the Application
The flow described below allows to start the application directly from the bootloader upon a specific command reception. Two options are possible: * Start the application with a reset pulse generation (using watchdog). When the device receives this command the watchdog is enabled and the bootloader enters a waiting loop until the watchdog resets the device. Be aware that if an external reset chip is used, the reset pulse in output may be wrong and in this case the reset sequence is not correctly executed. Start the application without reset A jump at the address 0000h is used to start the application without reset.
*
To start the application, the Host sends a DFU_DNLOAD request with the specified application start type in the data field (3 or 5 bytes). This request is immediately followed by a second DFU_DNLOAD request with no data field to start the application with one of the two options. Request from Host SETUP IN OUT DFU_UPLOAD Jump option (3 or 5 bytes) ZLP
SETUP
DFU_UPLOAD
Command Identifier Id_write_command 04h
data[0]
data[1] 00h
data[2]
data[3]
data[4]
Description Hardware reset
03h 01h address LJMP address
Answer from Bootloader No answer is returned by the device.
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In-Application Programming/S elfProgramming
The IAP allows to reprogram the microcontroller on-chip Flash memory without removing it from the system and while the embedded application is running. The user application can call Application Programming Interface (API) routines allowing IAP. These API are executed by the bootloader. To call the corresponding API, the user must use a set of Flash_api routines which can be linked with the application. Example of Flash_api routines are available on the Atmel web site: C Flash Drivers for the AT89C51SND1 The Flash_api routines on the package work only with the USB bootloader. The Flash_api routines are listed in APPENDIX-B.
API Call
Process The application selects an API by setting the 4 variables available when the Flash_api library is linked to the application. These four variables are located in RAM at fixed address: * * * * api_command: 1Ch api_value: 1Dh api_dph: 1Eh api_dpl: 1Fh
All calls are made through a common interface "USER_CALL" at the address FFC0h. The jump at the USER_CALL must be done by LCALL instruction to be able to comeback in the application. Before jump at the USER_CALL, the bit ENBOOT in AUXR1 register must be set. Constraints The interrupts are not disabled by the bootloader. Interrupts must be disabled by user prior to jump to the USER_CALL, then re-enabled when returning. The user must take care of hardware watchdog before launching a Flash operation. For more information regarding the Flash writing time see the AT89C51SND1 datasheet.
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API Commands
Several types of APIs are available: * * * * * Read/Program Flash Memory Read/Program Flash memory Read Configuration and Manufacturer Information Program Configuration Information Erase Flash Start bootloader
To read the Flash memory the bootloader is not involved. For more details on these routines see the AT89C51SND1 Datasheet section "Program/Code Memory". Two routines are available to program the Flash: - - * __api_wr_code_byte __api_wr_code_page
The application program load the column latches of the Flash then call the __api_wr_code_byte or __api_wr_code_page see the datasheet section "Program/Code Memory". Parameter settings
API Name __api_wr_code_byte __api_wr_code_page api_command 0Dh api_dph - api_dpl - api_value -
*
*
Instruction: LCALL FFC0h.
No special resources are used by the bootloader during this operation
Note:
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Read Configuration and Manufacturer Information
*
Parameter settings
api_command 08h 05h 05h 05h 05h 05h 05h 05h 05h 0Eh api_dph - - - - - - - - - - api_dpl 00h 00h 01h 05h 06h 30h 31h 60h 61h 00h api_value return HSB return BSB return SBV return SSB return EB return manufacturer id return id1 return id2 return id3 return value
API Name __api_rd_HSB __api_rd_BSB __api_rd_SBV __api_rd_SSB __api_rd_EB __api_rd_manufacturer __api_rd_device_id1 __api_rd_device_id2 __api_rd_device_id3 __api_rd_bootloader_version
* *
Instruction: LCALL FFC0h. At the complete API execution by the bootloader, the value to read is in the api_value variable.
No special resources are used by the bootloader during this operation
Note:
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Program Configuration Information * Parameter settings
api_command 07h 07h 07h 07h 04h 04h 04h 04h api_dph - - - - - - - - api_dpl - - - - 00h 01h 05h 06h api_value (HSB & BFh) | 40h HSB & BFh (HSB & 7Fh) | 80h HSB & 7Fh value to write value to write value to write value to write API Name __api_clr_BLJB(1) __api_set_BLJB __api_clr_X2(3) __api_set_X2
(4) (2)
__api_wr_BSB __api_wr_SBV __api_wr_SSB __api_wr_EB
*
Instruction: LCALL FFC0h.
1. 2. 3. 4. 5. 6. Unprogram BLJB so disable bootloader exection at reset. Program BLJB so enable bootloader exection at reset. Unprogram X2B so disable X2 mode at reset. Program X2B so enable X2 mode at reset. Refer to the AT89C51SND1 datasheet for information on Write operation Timing. No special resources are used by the bootloader during these operations.
Notes:
Erasing the Flash
The AT89C51SND1 Flash memory is divided into four blocks: Block 0: from address 0000h to 1FFFh (64 pages) Block 1: from address 2000h to 3FFFh (64 pages) Block 2: from address 4000h to 7FFFh (128 pages) Block 3: from address 8000h to FFFFh (256 pages) * Parameter settings
api_command 00h 00h 00h 00h api_dph 00h 20h 40h 80h api_dpl - - - - api_value - - - -
API Name __api_erase_block0 __api_erase_block1 __api_erase_block2 __api_erase_block3
*
Instruction: LCALL FFC0h.
1. Refer to the AT89C51SND1 datasheet for information on Write operation Timing, then multiply this timing by the number of pages. 2. No special resources are used by the bootloader during these operations.
Notes:
Starting the Bootloader
This routine allows to start at the beginning of the bootloader as after a reset. After calling this routine the regular boot process is performed and the communication must be opened before any action. * * * No special parameter setting Set bit ENBOOT in AUXR1 register instruction: LJUMP or LCALL at address F000h 29
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Appendix A
Table 17. Summary of Frames from Host
Command Identifier Id_prog_start 01h Id_display_data 03h data[0] 00h 00h start_address 01h 00h 20h 00h 40h 80h FFh Id_write_command 04h 01h 05h 06h 02h 03h 01h 00h 00h 01h 02h 00h 01h Id_read_command 05h 01h 30h 31h 60h 61h 02h 00h Read Manufacturer Code Read Family Code Read Product Name Read Product Revision Read HWB 05h 06h address LJMP address Read Bootloader Version Read Device boot ID1 Read Device boot ID2 Read BSB Read SBV Read SSB Read EB 00h Value 00h Hardware reset 00h 01h Value Write value in SSB Write value in EB Write value in Fuse (HSB) end_address Blank Check in Flash Erase block0 (0K to 8K) Erase block1 (8K to 16K) Erase block2 (16K to 32K) Erase block3 (32K to 64K) Full Chip Erase (bits at FFh) Write value in BSB Write value in SBV data[1] data[2] data[3] data[4] Description Init Flash programming Display Flash Data
start_address
end_address
Table 18. DFU Class-specific Requests
bmRequestType 0010 0001b bRequest DFU_DETACH (0) wValue wTimeout wIndex Interface (4) wLength Zero Data none
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Table 18. DFU Class-specific Requests
bmRequestType 0010 0001b 1010 0001b 1010 0001b 0010 0001b 1010 0001b 0010 0001b bRequest DFU_DNLOAD (1) DFU_UPLOAD (2) DFU_GETSTATUS (3) DFU_CLRSTATUS (4) DFU_GETSTATE (5) DFU_ABORT (6) wValue wBlock wBlock Zero Zero Zero Zero wIndex Interface (4) Interface (4) Interface (4) Interface (4) Interface (4) Interface (4) wLength Length Length 6 Zero 1 Zero Data Firmware Firmware Status none State none
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Appendix B
Flash API Routines
Table 19. API Summary
Function Name __api_rd_code_byte __api_wr_code_byte __api_wr_code_page __api_erase block0 __api_erase block1 __api_erase block2 __api_erase block3 __api_rd_HSB __api_clr_BLJB __api_set_BLJB __api_clr_X2 __api_set_X2 __api_rd_BSB __api_wr_BSB __api_rd_SBV __api_wr_SBV __api_erase_SBV __api_rd_SSB __api_wr_SSB __api_rd_EB __api_wr_EB __api_rd_manufacturer __api_rd_device_id1 __api_rd_device_id2 __api_rd_device_id3 __api_rd_bootloader_version __api_start_bootloader __api_start_isp Bootloader Execution no yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes no no 0Dh 0Dh 00h 00h 00h 00h 08h 07h 07h 07h 07h 05h 04h 05h 04h 04h 05h 04h 05h 04h 05h 05h 05h 05h 0Eh 00h 00h 01h 01h 01h 05h 05h 06h 06h 30h 31h 60h 61h 00h 00h 20h 40h 80h 00h return value (HSB & BFh) | 40h HSB & BFh (HSB & 7Fh) | 80h HSB & 7Fh return value value return value value FFh return value value return value value return value return value return value return value return value api_command api_dph api_dpl api_value
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